SHCMP 2008

Workshop on Software and Hardware Challenges of Manycore Platforms

Beijing, China, June 22, 2008

Co-located with ISCA'08
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Welcome & Introduction, 08:15:00-08:30:00
Chaired by Xinmin Tian

Keynote Speech: Prof. Guang R. Gao, University of Delaware, 08:30:00-09:15:00
Chaired by Xinmin Tian

Weak Memory Models - A Fresh Look in Multi-/Many-Core Era

Session 1: Transactional Memory, 09:15:00-10:15:00
Chaired by Xinmin Tian

  1. Software Transactional Memory Validation -- Time and Space Considerations,
    Adam Welc, Bratin Saha
  2. Steal-on-abort: Dynamic Transaction Reordering to Reduce Conflicts in Transactional Memory,
    Mohammad Ansari, Mikel Lujan, Christos Kotselidis, Kim Jarvis, Chris Kirkham, Ian Watson
Break, 10:15:00-10:30:00
Session 2: Architecture, 10:30:00-12:00:00
Chaired by Wenguang Chen

  1. Identifying Performance Bottlenecks of SPEC CPU2006 on a MultiCore,
    Arun Kejariwal, Milind Girkar, Xinmin Tian, Hideki Saito, Alexandru Nicolau, Alexander Veidenbaum
  2. Multiple Macro-Tile Stream Architecture,
    Nan Wu, Qianming Yang, Mei Wen, Yi He, Ju Ren, Maolin Guan, Chunyuan Zhang
  3. A Reactive Unobtrusive Prefetcher for Multicore and Manycore Architectures,
    Jason Mars, Daniel Williams, Dan Upton, Sudeep Ghosh, Kim Hazelwood
    The paper will be presented at the beginning of session 3 because time conflicts of authors
Lunch, 12:00:00-13:00:00
Session3: Task Management and Parallel Algorithms, 13:00:00-15:00:00
Chaired by Mateo Valero

  1. Asynchronized Parallel Algorithm for Delaunay Triangulation Problem on CMPs,
    Xiao Zifeng, He Jin, Han Jizhong, Han Chengde
  2. An Efficient and Flexible Task Management for Many-Core Architecture,
    Nan YUAN, Lei YU, Dongrui FAN
  3. Independent Task Scheduling based on Global Memory Access Phases for multi-core processors,
    Chao Zhang, Yang Yang
Break, 15:00:00-15:30:00
Session 4: Software Tools, 15:30:00-17:00:00
Chaired by Binyu Zang

  1. A Modular Simulator Framework for Network-on-Chip based Manycore Chips,
    Xiongfei Liao, Wu Jigang, Thambipillai Srikanthan
  2. Parallelizing Compiler Cooperative Heterogeneous Multicore,
    Yasutaka Wada, Akihiro Hayashi, Takeshi Masuura, Jun Shirako, Hirofumi Nakano, Hiroaki Shikano, Keiji Kimura, Hironori Kasahara
  3. Explicitly Parallel Programming with Shared-Memory is Insane: At least make it Deterministic!,
    Joseph Devietti, Brandon Lucia, Luis Ceze, Mark Oskin
Panel Discussion, 17:00:00-18:00:00
Multi-Core/Many-Core Era: Time to redraw the boundaries between Architecture, Compiler and OS ?

Panel Chair: Prof. Guang R. Gao, University of Delaware

Panelist(Tentative):

  • Wenguang Chen, Tsinghua University
  • Pradeep Dubey, Intel
  • Konrad Lai, Intel
  • Trevor Mudge, University of Michigan
  • Tin-fook Ngai, Intel
  • Yale Patt, University of Texas at Austin