SHCMP 2008

Workshop on Software and Hardware Challenges of Manycore Platforms

Beijing, China, June 22, 2008

Co-located with ISCA'08


Main Page
Call for Papers [pdf]
Important Dates
Submission Guidelines
Committee
Sponsors
Paper Submission
Program
Travel/Accommodation
Registration
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Call for Papers [pdf]

Processors containing two or more cores are already shipping in volume and, soon, most mainstream computers will contain manycore processors containing 8 or more (possibly heterogeneous) cores. This shift to an increasing number of cores will place new burdens on mainstream software and will require new software tools for developing systems. In addition, parallel computing has come a long way boosting the performance for numerical scientific applications. However, today, mainstream application programmers are challenged by facing a daunting task of parallelizing general non-numerical applications and must have reasonable knowledge of architecture, compilers, threading libraries and multithreading, it is time to explore new technologies so that general programs can be multithreaded efficiently and effectively for manycore platforms. This workshop provides a forum for the presentation of research on all aspects of software and hardware for developing applications on manycore platforms.

Areas of interest include but are not limited to the following topics:

  • New concurrency abstractions, language and development environments for mainstream parallel programming
  • Compilers and runtime systems for manycore systems
  • Manycore architecture and on-chip memory hierarchy design for manycore processors
  • Software and hardware for transactional memory
  • Speculative multithreading
  • Application frameworks, design patterns, and domain-specific languages for developing manycore applications
  • Data race detectors, debuggers, and performance analysis tools for manycore systems
  • Software tools for discovering parallelism
  • Software abstractions and tools for programming heterogeneous manycore systems
  • Operating systems and virtual machines for manycore
  • Simulation of manycore systems

Important Dates:

  • Paper Submission Deadline: April 25, 2008
  • Paper Acceptance Notification: May 23, 2008 (Delayed)
  • Conference: June 22, 2008

Submission Guidelines

Papers should present original research and should provide sufficient background material to make them accessible to the broader community. In addition, we solicit papers from practitioners describing problems and experiences building tools for manycore systems.

Full paper submissions should not exceed 10 pages in standard ACM conference format. Papers should be submitted electronically through the workshop web site (to be set up).

Proceedings of accepted papers will be made available at the workshop. Selected papers will appear in the special issue of the HiPEAC Journal later. Authors of accepted papers will have the option to decide if they want their papers to appear in this special issue. Submitted papers must not be simultaneously under review for any other conferences, and authors should point out any substantial overlap with their previously published or currently submitted work.

Committee

Steering Committee:

  • Jesse Fang, Intel
  • Guang R. Gao, University of Delaware
  • Kei Hiraki, University of Tokyo
  • Mateo Valero, UPC
  • Weimin Zheng, Tsinghua University, China

General Co-Chair:

  • Ali-Reza Adl-Tabatabai, Intel
  • Weimin Zheng, Tsinghua University

Program Co-Chair:

  • Xinmin Tian, Intel
  • Wenguang Chen, Tsinghua University

Program committee:

  • Hong An, USTC
  • Eduard Ayguade, UPC
  • Aart Bik, Google Inc.
  • Albert Cohen, INRIA
  • Bronis R. de Supinski, LLNL
  • Evelyn Dusterwald, IBM
  • Xiaobing Feng, ICT
  • Maurice Herlihy, Brown University
  • Hironori Kasahara, Waseda University
  • Keshav Pingali, University of Texas, Austin
  • Vivek Sarkar, Rice University
  • Osman Unsal, BSC
  • Binyu Zang, Fudan University

Sponsors

ACM SIGARCH IEEE TCCA